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ZXCD1010
HIGH FIDELITY CLASS D AUDIO AMPLIFIER SOLUTION
DESCRIPTION
The ZXCD1010 provides complete control and modulation functions at the heart of a high efficiency high performance Class D switching audio amplifier solution. In combination with matched output magnetics and Zetex HDMOS MOSFET devices, the ZXCD1010 provides a high performance Class D audio amplifier with all the inherent benefits of Class D. The ZXCD1010 is an enhanced version of the ZXCD1000. The timing resistor for the oscillator is taken off the chip enabling improved oscillator frequency matching device to device. The ZXCD1010 solution uses proprietary circuitry and magnetic technology to realise the true benefits of Class D without the traditional drawback of poor distortion performance. The combination of circuit design, magnetic component choice and layout are essential to realising these benefits. The ZXCD1010 reference designs give output powers up to 100W rms with typical open loop (no feedback) distortions of less than 0.2% THD + N over the entire audio frequency range at 90% full output power. This gives an extremely linear system. The addition of a minimum amount of feedback (10dB) further reduces distortion figures to give < 0.1 % THD + N typical at 1kHz. From an acoustic point of view, even more important than the figures above, the residual distortion is almost totally free of any crossover artifacts. This allows the ZXCD1010 to be used in true hi-fi applications. This lack of crossover distortion, sets the ZXCD1010 solutions quite apart from most other presently available solutions.
FEATURES
* 90% efficiency * External ROSC COSC for improved accuracy * 4 / 8 drive capability * Noise Floor -115dB for solution * Flat response 20Hz - 20kHz * High gate drive capability ( 2200pF) * Very low THD + N 0.2% typical of full power up to
90% ( for the solution)
APPLICATIONS
* * * * * * * *
DVD receivers Automotive audio systems Home Theatre Multimedia Wireless speakers Portable audio Sub woofer systems Public Address systems
* Complete absence of crossover artifacts * OSC output available for sync in multi-channel
applications
Distortion v Power (8 open loop at 1kHz.)
* Available in a 16 pin exposed pad QSOP package * Refer to ZXCD1000 data sheet for typical
characteristics and applications indormation
ISSUE 3 - NOVEMBER 2003 1
SEMICONDUCTORS
ZXCD1010
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage with respect to GND VCC Power Dissipation Package Thermal Resistance ( ja) Operating Temperature Range Maximum Junction Temperature Storage Temperature Range 20V 1W 54 C/W -40 C to 70 C 125 C -50C to 85 C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (unless otherwise stated) VCC = 16V, TA = 25C SYMBOL
V CC I ss F osc F osc(tol) Vol OutA/B Voh OutA/B T Drive
PARAMETER
Operating Voltage Range Operating Quiescent Current Switching Frequency Frequency Tolerance Low level output voltage High level output voltage Output Drive Capability (OUT A / B Rise/Fall) Internal Rail Tolerance Internal Rail Tolerance Input Impedence Input Impedence Bias Level Bias Level Amplitude
CONDITIONS MIN
12 V CC = 12V V CC = 18V, 16V C OSC = 330pF, R OSC = 31k5 C OSC = 330pF, R OSC = 31k5 No load No load Load Capacitance = 2200pF 1F Decoupling 1F Decoupling 5.16 8.32 1.35k 1.35k 2.95 2.95 0.89 7.5 173
LIMITS TYP
16
UNITS MAX
18 45 50 V mA mA kHz % mV V
192
211 +/-10 100
50
ns
5V5tol 9VA/Btol Audio A / B Triangle A/B Audio A / B Triangle A/B Osc A / B
5.5 8.75 1.8k 1.8k 3.1 3.1 1.05
5.77 9.18 2.3k 2.3k 3.25 3.25 1.2
V V
V V V
ISSUE 3 - NOVEMBER 2003
SEMICONDUCTORS
2
ZXCD1010
Pin number
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Pin Name
Audio A Triangle A Osc A R OSC C osc Osc B Triangle B Audio B Gnd OUT B Gnd2 9VB VCC 9VA OUT A 5V5
Pin Description
Audio Input for Channel A Triangle Input for Channel A Triangle Output External timing resistor node (to set the switching frequency) External timing capacitor node (to set the switching frequency) Triangle Output (for slave ZXCD1010 in stereo application) Triangle Input for Channel B Audio Input for Channel B Small Signal GND Channel B PWM Output to drive external Bridge MOSFETs Power GND (for Output Drivers) Internal Supply Rail (Decouple with 1F Cap) Input Supply Pin (Max = 18V) Internal Supply Rail (Decouple with 1F Cap). Channel A PWM Output to drive external Bridge MOSFETs Internal Supply Rail (Decouple with 1F Cap)
Audio A Triangle A Osc A R
Osc B Triangle B Audio B
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
5V5 Out A 9VA VCC 9VB Gnd2 Out B Gnd
Figure 1 Pin Connection Diagram
ISSUE 3 - NOVEMBER 2003 3
SEMICONDUCTORS
ZXCD1010
ZXCD1010 Class D controller IC
A functional block diagram of the ZXCD1010 is shown in Figure 2. The on chip series regulators drop the external VCC supply (12V-18V) to the approximate 9V (9VA/9VB) and 5.5V (5V5) supplies required by the internal circuitry. A triangular waveform is generated on chip and is brought out at the OscA and OscB outputs. The frequency of this is set (to ~200kHz) by an external capacitor (Cosc) and resistor (Rosc). The triangular waveform must be externally AC coupled back into the ZXCD1010 at the TriangleA and TriangleB inputs. AC coupling ensures symmetrical operation resulting in minimal system DC offsets. TriangleA is connected to one of the inputs of a comparator and TriangleB is connected to one of the inputs of a second comparator. The other inputs of these two comparators are connected to the AudioA and AudioB inputs, which are anti-phase signals externally derived from the audio input. The triangular wave is an order higher in frequency than the audio input (max 20kHz). The outputs of the comparators toggle every time the TriangleA/B and the (relatively slow) AudioA/B signals cross.
Buffers
Out A
Figure 2 Functional Block Diagram
ISSUE 3 - NOVEMBER 2003
SEMICONDUCTORS
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ZXCD1010
PWM Comparator Audio A/B
Audio A/B Triangle A/B
O/P Triangle A/B
Comparator O/P (Duty Cycle = 50%)
Triangle A/B Audio A/B O/P
Audio A/B
Triangle A/B
Comparator O/P (Duty Cycle = 75%)
Comparator O/P (Duty Cycle = 25%)
Figures 3a,3b,3c and 3d The audio input Pulse Width Modulates the comparator output With no audio input signal applied, the AudioA/B inputs are biased at the mid-point of the triangular wave, and the duty cycle at the output of the comparators is nominally 50%. As the AudioA/B signal ascends towards the peak level, the crossing points with the (higher frequency) triangular wave also ascend. The comparator monitoring these signals exhibits a corresponding increase in output duty cycle. Similarly, as the AudioA/B signal descends, the duty cycle is correspondingly reduced. Thus the audio input Pulse Width Modulates the comparator outputs. This principle is illustrated in Figures 3a, b, c and d. The comparator outputs are buffered and used to drive the OutA and OutB outputs. These in turn drive the speaker load (with the audio information contained in the PWM signal) via the off chip output bridge and single stage L-C filter network. The ramp amplitude is approximately 1V. The AudioA, AudioB, TriangleA and TriangleB inputs are internally biased to a DC voltage of approximately VCC/5. The mid - point DC level of the OscA and OscB triangular outputs is around 2V. The triangular wave at the Cosc pin traverses between about 2.7Vand 3.8V and the dist pin exhibits a roughly square wave from about 1.4V to 2V. (The above voltages may vary in practice and are included for guidance only).
ISSUE 3 - NOVEMBER 2003 5
SEMICONDUCTORS
ZXCD1010
SEMICONDUCTORS
6
ISSUE 3 - NOVEMBER 2003
Figure 4 Zetex Class D 25W Mono Open Loop Solution
ZXCD1010
Class D 25W Mono Open Loop (Bridge Tied Load - BTL) Solution - Circuit Description
Proprietary circuit design and high quality magnetics are necessary to yield the high THD performance specified. Deviation from the Zetex recommended solution could significantly degrade performance. The speaker is connected as a Bridge Tied Load (BTL). This means that both sides of the speaker are driven from the output bridge and therefore neither side of the speaker connects to ground. This allows maximum power to be delivered to the load, from a given supply voltage. The supply voltage for this solution is nominally 16V for 25W into a 4 load. A schematic diagram for the solution is shown in Figure 4. The audio input is AC coupled and applied to a low pass filter and a phase splitter built around the NE5532 dual op-amp. One of these op-amps is configured as a voltage follower and the other as a X1 inverting amplifier. This produces in phase and inverted signals for application to the ZXCD1010. The op-amp outputs are AC coupled into the ZXCD1010 Audio A and Audio B inputs via simple R-C low pass filters (R16/C3 and R15/C7). The op-amps are biased to a DC level of approximately 6V by R11 and R12. The Pulse Width Modulated (PWM) outputs, OutA and OutB, which contain the audio information, are AC coupled and DC restored before driving the Zetex ZXM64P03X and ZXM64N03X PMOS and NMOS output bridge FET's. AC coupling is via C17, C18, C19 and C20. DC restoration is provided by the D2(A1a)/R4, D1(A4a)/R2 and D3(A1a)/R6, D4(A4a)/R9 components. This technique allows the output stage supply voltage to be higher than the high level of the OutA and OutB outputs (approximately 8.5V), whilst still supplying almost the full output voltage swing to the gates of the bridge FET's (thereby ensuring good turn on). This can be exploited to yield higher power solutions with higher supply voltages - this is discussed later. The resistor/diode combinations (R5/D2(A16b), R3/D1(A4b), R7/D3(A1b) and R8/D4(A4b)) in series with the bridge FET gates, assist in controlling the switching of the bridge FET's. This design minimises shoot through currents whilst still achieving the low distortion characteristics of the system. The purpose of the special inductors in conjunction with the output capacitors C23, C24, C25 and C26 is to low pass filter the high frequency switching PWM signal that comes from the bridge. Thus the lower frequency audio signal is recovered and is available at the speakerA and speakerB outputs across which the speaker should be connected. Zetex can offer advice on suitable source for the specialist magnetics. ISSUE 3 - NOVEMBER 2003 7
SEMICONDUCTORS
The optional components R17 and C3 form a Zobel network. The applicability of these depends upon the application and speaker characteristics. Suggested values are 47nF and 10 ohms Efficiency Figure 5 shows the measured efficiency of the Zetex solution at various power levels into both 4 and 8 loads. As a comparison, typical efficiency is plotted for a class A-B amplifier. They clearly demonstrate the major efficiency benefits available from the Zetex class D solution.
Figure 5 Output Stage Efficiency v Power with 4
and 8
loads
ZXCD1010
Other Solutions - Stereo and Higher Powers
STEREO It is possible to duplicate the above solution to give a 2 channel stereo solution. However if the oscillator frequencies are not locked together, a beat can occur which is acoustically audible. This is undesirable. A stereo solution which avoids this problem can be achieved by synchronising the operating frequencies of both ZXCD1010's class D controller IC's, by slaving one device from the other. This is illustrated in Figure 6. Great care must be taken when linking the triangle from the master to the slave. Any pickup can cause slicing errors and result in increased distortion. The best connection method is to run two tracks, side by side, from the master to the slave. One of these tracks would be the triangle itself, and the other would be the direct local ground linking the master pin9 ground to the slave pin 9 ground.
MASTER
Figure 6 Frequency synchronisation for stereo applications
SLAVE
ISSUE 3 - NOVEMBER 2003
SEMICONDUCTORS
8
ZXCD1010
Higher Power Solutions
With some modifications the applications solutions can be extended to give output power up to 100W. The main differences being the supply voltage, the TO220 MOSFETs (ZXM64N035L3 and ZXM64P035L3), and the output magnetics. The magnetics for 100W are necessarily larger than required for 25W in order to handle the higher load currents. For 100W operation the supply voltage to the circuit is nominally 35V with a 4 load. The ZXCD1010 class D controller IC is inherently capable of driving even higher power solutions, with the appropriate external circuitry. However the maximum supply voltage to the ZXCD1010 class D controller IC is 18V so the higher supply voltages must therefore be dropped. Also due consideration must be given to the ZXCD1010 output drive levels and the characteristics of the bridge MOSFET's. The latter must be sufficiently enhanced by the OutA and OutB outputs to ensure the filter and load network is driven properly. If the gate drive of the ZXCD1010 is too low for the chosen MOSFET then the OUTA and OUTB signal must be buffered using an appropriate MOSFET driver circuit. Additionally, suitable magnetics are essential to achieve good THD performance. Package details The ZXCD1010 is available in a 16 pin exposed pad QSOP package. The exposed pad on the underside of the package should be soldered down to an area of copper on the PCB, to function as a heatsink. The PCB should have plated through vias to the underside of the board, again connecting to an area of copper.
ISSUE 3 - NOVEMBER 2003 9
SEMICONDUCTORS
ZXCD1010
ZXCD1010 Solution performance figures
Typical performance graphs for the Zetex 25W open loop solution are shown here for both 4 and 8 loads. These graphs further demonstrate the true high fidelity performance achieved by the Zetex solutions.
THD + N (%)
10W 1W 5W
Output Power
dB
f(Hz)
THD v Power into 8
at 1kHz
FFT of distortion and noise floor at 1W (8
load)
dB
dB
f(Hz)
f(Hz)
Frequency response (8
load)
FFT of distortion and noise floor at 10W (8
load)
ISSUE 3 - NOVEMBER 2003
SEMICONDUCTORS
10
ZXCD1010
THD + N (%)
20W 1W 5W 10W
Output Power
dB
f(Hz)
THD v Power into 4
at 1kHz
FFT of distortion and noise floor at 1W (4
load)
dB
f(Hz)
dB
f(Hz)
Frequency response (4 load) Note roll off. This can be corrected by using an alternative values for output filter components.
FFT of distortion and noise floor at 20W (4
load)
ISSUE 3 - NOVEMBER 2003 11
SEMICONDUCTORS
ZXCD1010
PACKAGE DIMENSIONS
EXPOSED PAD
C
S h x 45
3 2 1
H
E
SEE DETAIL "A"
BOTTOM VIEW TOP VIEW END VIEW
S Y M B O L
e
b
.010 A2 A SEATING PLANE L
O C
DETAIL "A"
D A1 SEATING PLANE
SIDE VIEW
DIMENSIONS IN INCHES MIN. NOM. MAX. A .058 .061 .066 A1 .001 .003 .005 A2 .055 .058 .061 .012 b .008 .010 c .007 D .189 .194 .196 E .150 .154 .157 e .025 BSC H .228 .236 .244 h .010 .016 .013 .035 .025 L .016 .005 .007 S .002 O C 0 5 8
C
ORDERING INFORMATION
Device ZXCD1010EQ16 Description Class D modulator Package QSOP16* T&R Suffix TA, TC
Information on Zetex reference designs, MOSFETs and demonstration boards can be obtain by contacting Zetex applications or by visiting www.zetex.com/audio *This package features an exposed pad which must be soldered down.
(c) Zetex plc 2003
Europe Zetex plc Fields New Road Chadderton Oldham, OL9 8NP United Kingdom Telephone (44) 161 622 4444 Fax: (44) 161 622 4446 hq@zetex.com Zetex GmbH Streitfeldstrae 19 D-81673 Munchen Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 europe.sales@zetex.com Americas Zetex Inc 700 Veterans Memorial Hwy Hauppauge, NY 11788 USA Telephone: (1) 631 360 2222 Fax: (1) 631 360 8222 usa.sales@zetex.com Asia Pacific Zetex (Asia) Ltd 3701-04 Metroplaza Tower 1 Hing Fong Road Kwai Fong Hong Kong Telephone: (852) 26100 611 Fax: (852) 24250 494 asia.sales@zetex.com
These offices are supported by agents and distributors in major countries world-wide. This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service. For the latest product information, log on to
www.zetex.com ISSUE 3 - NOVEMBER 2003
SEMICONDUCTORS
C
12

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